Commit Graph

621 Commits

Author SHA1 Message Date
Karlis Susters
b5a3a78e58 Minor change to multi window prefetcher design 2023-04-20 17:05:59 +01:00
Karlis Susters
4bc04b581d Config for L1I MultiWindowTarget-2 2023-04-19 14:22:01 +03:00
Karlis Susters
cc65297cf9 simplified simple stride slightly 2023-04-15 15:49:34 +03:00
Karlis Susters
8e3d6409c0 Simplified Stride2 code, using Int type 2023-04-15 15:37:59 +03:00
Karlis Susters
2f428a974a Reduce bit storage for stride prefetcher 2023-04-13 18:27:28 +03:00
Karlis Susters
2ec0f37bbd Remove stride prefetcher empty state 2023-04-13 13:39:22 +03:00
Karlis Susters
0e4b9a710a Implemented SimpleStride, to compare with Gem5 2023-04-12 23:31:15 +03:00
Karlis Susters
5733ed9ac0 Implemented overflow bypass fifo, required for double target table 2023-04-12 21:58:35 +03:00
Karlis Susters
f20e80e5b2 Tests for prefetchervector, double target table, overflow bypass fifo 2023-04-12 21:57:03 +03:00
Karlis Susters
d2b41c852d Added prefetcher port to ICrqmshr and retired prefetchRqDone 2023-04-12 21:55:13 +03:00
Karlis Susters
bf0f26ce56 Implemented double target table and the corresponding markov prefetcher 2023-04-12 21:52:56 +03:00
Karlis Susters
2d94cba951 Implemented vector prefetcher setup in L2 2023-04-12 21:50:31 +03:00
Karlis Susters
4ea9b17971 Minor changes to targettable and instruction target prefetchers 2023-04-12 21:31:08 +03:00
Karlis Susters
1ad1dfad6a Config for MarkovOnHit-2-8KiB. 2023-03-30 13:07:34 +01:00
Karlis Susters
625dbb3066 Count sent prefetch requests as Store misses, cache full cycles as stores 2023-03-30 13:06:12 +01:00
Karlis Susters
06651f1a31 Actually repurpose L1D store count, not store miss count 2023-03-24 15:15:03 +00:00
Karlis Susters
7d7d38ad49 Repurpose L1D store miss count to track number of cycles cache is full 2023-03-24 15:11:08 +00:00
Karlis Susters
a4ad28d865 Config for MarkovOnHit-1-bigtable 2023-03-23 11:09:36 +00:00
Karlis Susters
643afd81e2 Implementation and config for L1D StrideV2-2 prefetcher 2023-03-22 22:12:59 +00:00
Karlis Susters
808d961a7b Implementation and config for L1D MarkovOnHit-2-BigTable 2023-03-21 19:26:38 +00:00
Karlis Susters
1123f43423 Config for L1D Markov-2-Bigtable 2023-03-20 13:04:21 +00:00
Karlis Susters
e584786c93 Bugfix to Stride Adaptive config 2023-03-17 11:26:23 +00:00
Karlis Susters
cef4990ce3 Implement adaptive stride prefetcher, update prefetcher tests 2023-03-17 10:58:54 +00:00
Karlis Susters
65ed55cb8a Cleanup: remove non-BRAM prefetchers 2023-03-16 12:29:06 +00:00
Karlis Susters
9c4da78c34 Modifications and config for L1LL Markov-2 prefetcher 2023-03-16 11:55:27 +00:00
Karlis Susters
239e011adf Config for L1D Stride-2-BigTable 2023-03-15 16:30:35 +00:00
Karlis Susters
8617d38e80 Config for L1D Stride-2 prefetcher 2023-03-14 13:52:17 +00:00
Karlis Susters
ada7d133e4 Config for L1D Stride-4 prefetcher 2023-03-13 14:51:59 +00:00
Karlis Susters
54b9f6669e Bugfix for L1LL D prefetchers, config for L1LL D Stride-3 2023-03-08 13:37:04 +00:00
Karlis Susters
30a3aff5af Config for L1D Stride-3 prefetcher 2023-03-07 12:33:51 +00:00
Karlis Susters
a52a36e199 Push config for L1LL I Single window-2 prefetcher 2023-03-02 15:42:37 +00:00
Karlis Susters
1d2affc707 Set up config for L1I single window-2 prefetcher 2023-03-01 17:20:19 +00:00
Karlis Susters
6509cf6445 Changed config to L1D Block-1 prefetcher and fixed potential bug 2023-02-28 12:29:38 +00:00
Karlis Susters
e228854d9f Change config to next-1-line L1I prefetcher 2023-02-22 17:08:48 +00:00
Karlis Susters
87a88a749b Set up config for next-2-lines on miss L1I prefetcher 2023-02-21 10:45:56 +00:00
Karlis Susters
bd2ceec15f L1D prefetch into S, not M 2023-02-20 11:17:59 +00:00
Karlis Susters
2c9428d1f3 Prepared repo for building on FPGA 2023-02-13 21:52:50 +00:00
Karlis Susters
9d027a3f4b Implemented BRAM versions of stride, target, markov prefetchers 2023-02-13 11:59:26 +00:00
Karlis Susters
31ae938e78 Implemented a stride prefetcher with BRAM instead of vectors 2023-02-13 11:59:26 +00:00
Karlis Susters
79c55c5651 Implemented cross cache prefetching, fixed some coherence bugs in LLC 2023-02-13 11:59:26 +00:00
Karlis Susters
dca4b980c5 Implemented a markov chain data prefetcher 2023-02-13 11:59:26 +00:00
Karlis Susters
9f733eddf1 Merged reportHit & reportMiss, changed compile time parameter passing 2023-02-13 11:59:26 +00:00
Karlis Susters
06e648df6a Implemented target table module, refactored single and multi window instruction prefetchers to use it 2023-02-13 11:59:26 +00:00
Karlis Susters
7c05ebbd90 Implemented multi line target prefetcher 2023-02-13 11:59:26 +00:00
Karlis Susters
e602d4780e LLC prefetcher fixes and single window target prefetcher implementation 2023-02-13 11:59:26 +00:00
Karlis Susters
347107b733 Prefetcher implementation in both L1 and LL and data logging 2023-02-13 11:59:26 +00:00
Peter Rugg
50c51e93a1 Add assertion that ndm resets don't get dropped 2023-02-09 14:34:13 +00:00
Peter Rugg
6931201a14 Avoid wedge on repeated debug resumes (with jdw57 and aj443)
ConfigReg avoids a compile error
2023-01-31 21:02:17 +00:00
Peter Rugg
e120b3427d Merge branch 'LoadTagsImprove' into CHERI 2022-11-14 13:28:44 +00:00
Alexandre Joannou
54456b5f50 Fix the non-rvfi_dii build 2022-10-21 09:50:49 +00:00