Karlis Susters
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d2b41c852d
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Added prefetcher port to ICrqmshr and retired prefetchRqDone
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2023-04-12 21:55:13 +03:00 |
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Karlis Susters
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bf0f26ce56
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Implemented double target table and the corresponding markov prefetcher
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2023-04-12 21:52:56 +03:00 |
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Karlis Susters
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2d94cba951
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Implemented vector prefetcher setup in L2
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2023-04-12 21:50:31 +03:00 |
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Karlis Susters
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4ea9b17971
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Minor changes to targettable and instruction target prefetchers
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2023-04-12 21:31:08 +03:00 |
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Karlis Susters
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d6b54be882
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Config for no-prefetcher baseline
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2023-04-04 11:30:01 +03:00 |
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Karlis Susters
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1ad1dfad6a
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Config for MarkovOnHit-2-8KiB.
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2023-03-30 13:07:34 +01:00 |
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Karlis Susters
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625dbb3066
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Count sent prefetch requests as Store misses, cache full cycles as stores
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2023-03-30 13:06:12 +01:00 |
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Karlis Susters
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06651f1a31
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Actually repurpose L1D store count, not store miss count
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2023-03-24 15:15:03 +00:00 |
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Karlis Susters
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96bed3532e
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Config for L1D StrideV2-2 prefetcher
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2023-03-24 15:11:39 +00:00 |
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Karlis Susters
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7d7d38ad49
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Repurpose L1D store miss count to track number of cycles cache is full
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2023-03-24 15:11:08 +00:00 |
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Karlis Susters
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a4ad28d865
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Config for MarkovOnHit-1-bigtable
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2023-03-23 11:09:36 +00:00 |
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Karlis Susters
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643afd81e2
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Implementation and config for L1D StrideV2-2 prefetcher
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2023-03-22 22:12:59 +00:00 |
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Karlis Susters
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808d961a7b
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Implementation and config for L1D MarkovOnHit-2-BigTable
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2023-03-21 19:26:38 +00:00 |
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Karlis Susters
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1123f43423
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Config for L1D Markov-2-Bigtable
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2023-03-20 13:04:21 +00:00 |
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Karlis Susters
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fe95337a97
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Add STRIDE_ADAPTIVE to makefile
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2023-03-20 11:41:03 +00:00 |
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Karlis Susters
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15b9243f9a
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Set up config for L1D StrideAdaptive prefetcher
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2023-03-17 11:26:49 +00:00 |
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Karlis Susters
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e584786c93
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Bugfix to Stride Adaptive config
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2023-03-17 11:26:23 +00:00 |
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Karlis Susters
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cef4990ce3
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Implement adaptive stride prefetcher, update prefetcher tests
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2023-03-17 10:58:54 +00:00 |
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Karlis Susters
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65ed55cb8a
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Cleanup: remove non-BRAM prefetchers
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2023-03-16 12:29:06 +00:00 |
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Karlis Susters
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9c4da78c34
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Modifications and config for L1LL Markov-2 prefetcher
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2023-03-16 11:55:27 +00:00 |
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Karlis Susters
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239e011adf
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Config for L1D Stride-2-BigTable
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2023-03-15 16:30:35 +00:00 |
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Karlis Susters
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8617d38e80
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Config for L1D Stride-2 prefetcher
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2023-03-14 13:52:17 +00:00 |
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Karlis Susters
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ada7d133e4
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Config for L1D Stride-4 prefetcher
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2023-03-13 14:51:59 +00:00 |
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Karlis Susters
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54b9f6669e
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Bugfix for L1LL D prefetchers, config for L1LL D Stride-3
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2023-03-08 13:37:04 +00:00 |
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Karlis Susters
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30a3aff5af
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Config for L1D Stride-3 prefetcher
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2023-03-07 12:33:51 +00:00 |
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Karlis Susters
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76c0071c9e
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Config for L1LL D Block-1 prefetcher
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2023-03-03 14:23:13 +00:00 |
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Karlis Susters
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a52a36e199
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Push config for L1LL I Single window-2 prefetcher
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2023-03-02 15:42:37 +00:00 |
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Karlis Susters
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1d2affc707
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Set up config for L1I single window-2 prefetcher
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2023-03-01 17:20:19 +00:00 |
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Karlis Susters
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6509cf6445
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Changed config to L1D Block-1 prefetcher and fixed potential bug
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2023-02-28 12:29:38 +00:00 |
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Karlis Susters
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7a352d774e
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Set up config for an L2 next-2-line-on-miss instruction prefetcher
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2023-02-24 11:43:29 +00:00 |
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Karlis Susters
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5cb283a5d5
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Set up config for L1D block prefetcher
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2023-02-23 10:30:47 +00:00 |
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Karlis Susters
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e228854d9f
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Change config to next-1-line L1I prefetcher
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2023-02-22 17:08:48 +00:00 |
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Karlis Susters
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87a88a749b
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Set up config for next-2-lines on miss L1I prefetcher
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2023-02-21 10:45:56 +00:00 |
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Karlis Susters
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42777725bf
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Random update change
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2023-02-20 15:47:24 +00:00 |
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Karlis Susters
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bd2ceec15f
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L1D prefetch into S, not M
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2023-02-20 11:17:59 +00:00 |
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Karlis Susters
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9ac29f4e11
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Enable only L1D block prefetcher
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2023-02-20 11:03:49 +00:00 |
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Karlis Susters
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56035b1ce4
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Changed prefetcher configuration
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2023-02-16 14:01:50 +00:00 |
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Karlis Susters
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7ac5ed5efd
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Change config to simpler one
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2023-02-14 16:47:06 +00:00 |
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Karlis Susters
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2c9428d1f3
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Prepared repo for building on FPGA
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2023-02-13 21:52:50 +00:00 |
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Karlis Susters
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9d027a3f4b
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Implemented BRAM versions of stride, target, markov prefetchers
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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31ae938e78
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Implemented a stride prefetcher with BRAM instead of vectors
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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79c55c5651
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Implemented cross cache prefetching, fixed some coherence bugs in LLC
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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dca4b980c5
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Implemented a markov chain data prefetcher
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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9f733eddf1
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Merged reportHit & reportMiss, changed compile time parameter passing
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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06e648df6a
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Implemented target table module, refactored single and multi window instruction prefetchers to use it
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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7c05ebbd90
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Implemented multi line target prefetcher
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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e602d4780e
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LLC prefetcher fixes and single window target prefetcher implementation
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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347107b733
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Prefetcher implementation in both L1 and LL and data logging
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2023-02-13 11:59:26 +00:00 |
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Peter Rugg
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69b96cc68f
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Extend the final missed id width
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2023-02-10 17:09:20 +00:00 |
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Peter Rugg
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b0316afcb7
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Extend missed id field width
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2023-02-10 17:01:32 +00:00 |
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