1a3915d8a2
Fix display message when running the dependency script
Alexandre Joannou
2020-04-27 15:27:16 +01:00
13d020cb9e
Merge branch 'parallel-build' into CHERI
jon
2020-04-27 15:19:05 +01:00
5693af05e5
Changes to make PCC consistent. Specifically, attach the bounds to PC all the way back into the branch predictors.
jon
2020-04-27 15:02:50 +01:00
dfde021eb6
Avoid creation of outputfile on failure of dependency script + add beri license header
Alexandre Joannou
2020-04-24 15:07:34 +01:00
6222ff6c9a
Merge branch 'CHERI' into parallel-build
jon
2020-04-24 11:47:27 +01:00
2251457840
Implement target bounds-check for CJALR.
jon
2020-04-23 17:54:18 +01:00
df7dde5759
Bump cheri-cap-lib
Peter Rugg
2020-04-23 15:44:47 +01:00
370ed61bc4
Integrate the generation of dependenices to Makefiles
Alexandre Joannou
2020-04-23 14:49:15 +01:00
28c09ef1df
Factor out SCR definitions
Peter Rugg
2020-04-23 13:15:26 +01:00
92e3216c69
Don't use special recursive build for the top level, as this just rebuilds everything.
jon
2020-04-23 10:42:45 +01:00
aa79240629
generalise genDependencies a bit with env variables (no obvious getoptsin tcl AFAIK)
Alexandre Joannou
2020-04-23 02:04:19 +01:00
f6b7132d4f
Makefile updates to do a parallel build, including the tcl script to generate a dependency graph using the Bluespec compiler (which was written by Alexandre).
jon
2020-04-22 16:00:58 +01:00
1859e86b4e
Merge branch 'pdr32-wip' into HEAD
Peter Rugg
2020-04-22 18:11:37 +01:00
3b30d2db36
Add BuildCap unsealing
Peter Rugg
2020-04-22 15:14:58 +01:00
8cc8f71cb9
Perform bounds check on requested length rather than rounded length.
Peter Rugg
2020-04-22 14:27:11 +01:00
a89a606a6d
Factor out Opcodes and CSRs into separate files
Peter Rugg
2020-04-21 20:36:56 +01:00
8a4fa786dd
Add CToPtr special case
Peter Rugg
2020-04-21 13:52:33 +01:00
1773530c72
Attempt to enable AUIPCC
Peter Rugg
2020-04-20 23:11:58 +01:00
923d4915cb
Make SetBounds legal
Peter Rugg
2020-04-20 23:05:26 +01:00
8e01cf68df
More concise FShow for CapChecks
Peter Rugg
2020-04-20 21:28:09 +01:00
b4be80eba1
Bounds Check fixes
Peter Rugg
2020-04-20 21:23:42 +01:00
7db3fa539f
Add ALU bounds check
Peter Rugg
2020-04-20 11:21:51 +01:00
b063497052
CHERI update to ReadMe
Marno van der Maas
2020-04-18 09:47:56 +01:00
1bb53e5e86
Merge branch 'CHERI' into pdr32-wip
Peter Rugg
2020-04-16 20:58:37 +01:00
f1e04486b7
Work on SCR-related instructions
Peter Rugg
2020-04-16 20:53:08 +01:00
34c4e0f2fa
Comment out user exception delegation SCRs since the corresponding CSRs are not yet supported
Peter Rugg
2020-04-16 20:43:44 +01:00
8269a0625e
Initial implementation of set bounds
Peter Rugg
2020-04-16 20:39:54 +01:00
4b2c3b1114
An attempt at doing the "right thing" with Jr targets and links with respect to PCC. This is not easy to test until we have CSetBounds.
jon
2020-04-16 18:07:39 +01:00
30974aa761
Merge pull request #14 from jrtc27/uncached-amo
Rishiyur S. Nikhil
2020-04-16 12:46:20 -04:00
a77ecc59af
Checkpoint work to propagate register numbers into the exception code. There's another half of this left to do to propagate all the way into the CSR file.
jon
2020-04-16 17:28:28 +01:00
3add2cac5e
Move MakeReset0.v to src_bsc_lib_RTL like Piccolo and Flute
Jessica Clarke
2020-04-16 17:19:16 +01:00
c056d40a3a
Trace the register that has been decoded rather than picking out the bits from the instruction. Duh.
jon
2020-04-15 14:08:36 +01:00
a0fb527ad7
Raise illegalInstruction for currently unsupported exceptions
Peter Rugg
2020-04-15 14:06:35 +01:00
e773cb0232
Add CIncOffsetImm
Peter Rugg
2020-04-15 14:05:39 +01:00
9685bf1931
Implement CCall, hopefully as well as CJALR. This passes the unmodified TestRIG routine for CHERI Control Flow, which is very promising indeed! There are some cases that are not covered there, but a lot is covered.
jon
2020-04-14 18:10:53 +01:00
dde283fc38
Merge pull request #13 from jrtc27/fetch-fixes
Rishiyur S. Nikhil
2020-04-10 08:51:52 -04:00
8455ee3f06
FetchStage.bsv: Fix fav_parse_insts when pending_straddle has "even" PC
Jessica Clarke
2020-04-08 04:47:55 +01:00
10c983d101
FetchStage.bsv: Drop unused pc from Fetch3ToDecode
Jessica Clarke
2020-04-08 04:22:49 +01:00
85b4a738a9
FetchStage.bsv: Fix a mkRegU that should be a mkReg
Jessica Clarke
2020-04-08 04:21:13 +01:00
72dc8f8bad
Fix cap instructions not being sent to ALU
Peter Rugg
2020-04-07 19:53:48 +01:00
56885f06c0
Changes for CJALR-only TestRIG to work. This includes replacing register read values with nullCap if reading x0, which is generally necessary. This is more-or-less using a new mechanism which shouldn't actually be necessary if the default value in the register file is nullCap. (In RVFI_DII, we initialise with the almightyCap instead.)
jon
2020-04-07 16:32:31 +01:00
9e72052437
Merge pull request #12 from jrtc27/step-fix
Rishiyur S. Nikhil
2020-04-07 09:14:55 -04:00
7accf2c1a0
Merge pull request #11 from CTSRD-CHERI/mac_build
Rishiyur S. Nikhil
2020-04-07 09:13:19 -04:00
ae78cd3d6a
Don't track built files
Peter Rugg
2020-04-07 13:56:34 +01:00
beaf771e13
Bump subrepo.
jon
2020-04-07 12:39:00 +01:00
2918854bbc
Add missing ifdef.
jon
2020-04-07 12:37:14 +01:00
850e632140
Changes for CJALR to work in a basic case, as well as piping CHERI exceptions through to commit, though the register isn't piped and I've undone some useful work for that piping. Oh well.
jon
2020-04-06 18:18:05 +01:00
4ce8f54903
Add initial exception checks
Peter Rugg
2020-04-06 12:25:44 +01:00
1ecdf73dd3
Make CJALR work like JALR but without an immediate. Seems to work! Obviously doesn't throw capability exceptions yet...
jon
2020-04-03 17:57:57 +01:00
d07d6f4761
Add OpCHERI to the function that rationalises opcodes.
jon
2020-04-03 16:42:14 +01:00
f20c644bae
Add startings of decoding
Peter Rugg
2020-04-02 21:08:10 +01:00
2c6ad40f93
Check the already decoded destination to decide to populate the register write data field in RVFI.
jon
2020-04-02 17:10:52 +01:00
b656f46859
Both enable tracing of floating-point register writes in RVFI-DII, and then properly not use them (since we're not expected to). This is better than using nonsense as we were previously doing on floating point instructions.
jon
2020-04-02 16:28:18 +01:00
7618c5cec8
Trap on access of fcsr when floating point is not enabled.
jon
2020-04-02 13:05:42 +01:00
4e0bd06a10
RenameStage.bsv: Fix single-step when only one instruction available
Jessica Clarke
2020-04-02 04:20:13 +01:00
4714070aef
Trace the next PC correctly for mret.
jon
2020-04-01 18:43:48 +01:00
c2917d558f
Bump library version to that required by current design.
jon
2020-04-01 14:44:21 +01:00
fe2420e42f
Allow running isa_tests on CPUs with <=4 cores
Peter Rugg
2020-03-31 17:34:41 +01:00
81da99237e
Move the register file to CapReg format, and pipe CapPipe around the pipeline.
Jonathan Woodruff
2020-03-31 15:44:23 +01:00
0580a24b86
Bump library to version including new casts needed for recent changes.
Jonathan Woodruff
2020-03-31 15:43:14 +01:00
480b5923da
Make type of register file generic.
Jonathan Woodruff
2020-03-30 15:20:28 +01:00
dbcc4a6c22
Re-add dummy Mem.hex file.
Jonathan Woodruff
2020-03-30 15:18:01 +01:00
db41e2b9ed
An initial implementation of mccsr.
Jonathan Woodruff
2020-03-27 17:47:02 +00:00
b5b2b4fe5c
Port AXI4 changes from Flute
Alexandre Joannou
2020-03-22 21:32:19 +00:00
92815e957e
Add BlueStuff to Makefile
Alexandre Joannou
2020-03-22 15:09:15 +00:00
ded8dc72e7
Do the MTCC->PCC->MEPCC shuffle on trap.
Jonathan Woodruff
2020-03-27 15:55:02 +00:00
8d61c8db73
Remove unnecessary copy of submodule.
Jonathan Woodruff
2020-03-27 15:54:06 +00:00
c035f359e8
Merge branch 'CHERI' into pdr32-tmp and get it to build!
Jonathan Woodruff
2020-03-26 18:03:58 +00:00
5f33b1c87a
Very initial decode and ALU work for CHERI
Peter Rugg
2020-03-26 14:35:02 +00:00
d5b73a2d50
Add DDC exception. Also enable working exception reporting for the memory pipe.
Jonathan Woodruff
2020-03-26 14:29:06 +00:00
f2f2285f75
Check the bounds on PCC and report the correct exception in Xcause registers. This required makeing the Exception type wider by one. The actual "inBounds" check is currently implemented in the reorder buffer rows, which duplicates the logic ~80 times (number of outstanding instructions), which isn't ideal, but it's using the quick in-bounds check that only compares the mantissa-sized things.
Jonathan Woodruff
2020-03-25 15:20:03 +00:00
88ca03f4ed
Pipe through an exception to the Reorder buffer from each execute pipe. Also move to SetAddrUnsafe, as is traditional for setting the address of PCC where we do proper checks on branches so we really only have the possibility of executing off the end of the length, and therefore cannot become unrepresentable.
Jonathan Woodruff
2020-03-25 11:51:33 +00:00
c813abe9c9
Write pcc bounds into reorderbuffer pc in the all execute pipeline stages. This allows pcc bounds to be consistent in the model of CSRs (written in commit and read in execute) in preparation for fancier forwarding eventually.
Jonathan Woodruff
2020-03-25 09:10:38 +00:00
22938d2384
Propagate a CapPipe through the PC of each instruction record.
Jonathan Woodruff
2020-03-23 17:24:05 +00:00
2aa902f61a
Change tabs to 8 spaces, this time being careful to do this only in BSV files.
Jonathan Woodruff
2020-03-23 14:44:39 +00:00
a6e5a7bff0
Revert "Fix whitespace in src_Core directory."
Jonathan Woodruff
2020-03-23 14:40:02 +00:00
a137a6ede7
Fix whitespace in src_Core directory. Replace all tabs with 8 spaces.
Jonathan Woodruff
2020-03-23 14:28:00 +00:00
43fa43e2c9
Implement writes to PCC and preparation for checking the bounds of PCC.
Jonathan Woodruff
2020-03-23 14:24:44 +00:00
a299a763ed
Add a special capability register file and pass it's interfaces to all the places that the current CSR file goes. We may need to trim some of these later, but most of them seem like places that we'll need access.
Jonathan Woodruff
2020-03-23 10:10:11 +00:00
c97ee15851
A couple initial files with beginnings of CHERI support.
Jonathan Woodruff
2020-03-20 15:34:18 +00:00
c5378a7a99
Merge branch 'RVFI_DII' into CHERI
Jonathan Woodruff
2020-03-20 11:41:15 +00:00
796e3a645d
Bump to version that imports string.h.
Jonathan Woodruff
2020-03-20 11:40:10 +00:00
d77c158b76
Merge branch 'mac_build' into RVFI_DII
Jonathan Woodruff
2020-03-20 11:35:11 +00:00
b830f4bf41
Resolve some issues to build on mac. This includes renaming Fifo.bsv to Fifos.bsv to account for a case insensitive file system which confuses this library with FIFO.bsv. Also this includes an update of the verilator flags that are needed for modern verilator. Finally, some verilator flag changes for building with LLVM.
Jonathan Woodruff
2020-03-19 19:21:59 +00:00
Alexandre Joannou