Cheri-research/Toooba
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  • 54d1a204f0 Don't decode redirected streams until they are non-speculative. Jonathan Woodruff 2021-12-17 16:29:14 +00:00
  • 4cc86b1e56 Revert more changes to buffer speculative training, as previous buffering of training from execute should be sufficient for the BTB as well. Jonathan Woodruff 2021-12-16 15:01:46 +00:00
  • 3322d1d3d7 Revert "An attempt at wiring up the specUpdate interface for the Btb." Jonathan Woodruff 2021-12-16 12:10:50 +00:00
  • 022df36199 An attempt at wiring up the specUpdate interface for the Btb. Jonathan Woodruff 2021-12-15 16:43:31 +00:00
  • 696f546ecb Version using searchableSpecFifo in BTB with actual searching, but without killing speculative elements yet. This one is full performance in CoreMark. Jonathan Woodruff 2021-12-15 11:18:33 +00:00
  • 657453a0a0 Two modules (that build) that should be helpful in delaying the commit of training data. Jonathan Woodruff 2021-12-14 16:17:54 +00:00
  • af69f2e5db Merge branch 'CHERI' into jdw57_prediction Jonathan Woodruff 2021-12-15 16:47:42 +00:00
  • 9b2318a9ba Simpelest strategy for making wrongSpec not conflict with loads of rules. This triggers some assertions in the ROB what should be dealt with properly if this is going to work. Jonathan Woodruff 2021-12-09 12:27:57 +00:00
  • 34c6ee1894 Specifically give priority to wrong_spec when they conflict. This appears to yield 10% performance improvement as our default setup appears to choose a wrong priority. Jonathan Woodruff 2021-12-03 12:36:40 +00:00
  • e761f18c26 Code to trace RAS predictions for measuring accuracy in simulation. Jonathan Woodruff 2021-11-29 12:19:00 +00:00
  • 37074525e1 removed unnecessary execute permissions for Decode.bsv, Exec.bsv, ProcTypes.bsv, ReorderBuffer.bsv, and AluExePipeline.bsv Franz Fuchs 2021-11-29 10:38:23 +00:00
  • 59836cc9e5 Hopefully optimise this function to have just one call to modifyOffset. Jonathan Woodruff 2021-11-25 17:39:46 +00:00
  • ad149db5c0 Hopefully optimise this function to have just one call to modifyOffset. Jonathan Woodruff 2021-11-25 17:39:46 +00:00
  • 4e0da006e8 Make non-speculative training optional. Removing non-speculative training actually improves performance in CoreMark. While it's "safer", I guess this isn't required for BSC. Jonathan Woodruff 2021-11-24 17:11:36 +00:00
  • ac92562be0 Merge pull request #19 from CTSRD-CHERI/mv380-ccopytypepullrequest Marno van der Maas 2021-11-17 09:54:57 +00:00
  • cc0114f645 Swap write priority, as suggested by Franz. Jonathan Woodruff 2021-11-16 15:40:01 +00:00
  • 7b472d4d3c Reduce area overhead by using an unguarded specfifo that does not have to be worst-case-sized, but can drop elements if it is full. Jonathan Woodruff 2021-11-16 13:53:34 +00:00
  • 618dea1225 Feed head of RAS through to execute with training info to reset the head on a misprediction. Jonathan Woodruff 2021-11-16 11:00:04 +00:00
  • d56045effe Make the associative BTB compressed. That is, only store the bottom 16 bits of the target if the upper bits of pc and nextPc match. Have a single "way" dedicated to full targets. Jonathan Woodruff 2021-11-15 11:50:57 +00:00
  • 54c0ccadf0 Only train from branches that have all previous branches resolved. Jonathan Woodruff 2021-11-12 17:55:04 +00:00
  • 0f86f09b6a Updated copyright statement Marno 2021-11-11 12:15:45 +00:00
  • 6ae92f786b Checking tag and seal on rVal2 and checking type on rVal1 in a way that does not use undefined behavior. Marno 2021-11-11 11:36:45 +00:00
  • 4d1dc29f79 Added ccopytype_bypass Marno 2021-11-10 11:48:11 +00:00
  • 04a5d82ff0 Go back to standard tournament predictor (which performs the best on CoreMark), though cleaning up slightly to use standard functions. Jonathan Woodruff 2021-11-10 09:54:34 +00:00
  • aec3e404ed Bumped RISCV HPM Events Franz Fuchs 2021-11-10 08:05:07 +00:00
  • 8379d77cc5 Don't use a synthesis barrier for Bht so that we don't have to add it to XML. The direction predictor already has one anyway. Jonathan Woodruff 2021-11-08 13:51:52 +00:00
  • e342600cb5 Try the traditional Bht, as it seems like it might be less fiddly with speculative training. Jonathan Woodruff 2021-11-08 12:34:07 +00:00
  • 6713505d12 Experiment with different Bht constants to see if these affect our benchmark. Jonathan Woodruff 2021-11-05 18:52:40 +00:00
  • d5e52a9ecb Revert to upstream direction predictors to reduce diffs and prepare for improvements that can be upstreamed. Basically, only use addresses in these predictors rather than capabilities, and just pass an address in from the FetchStage. Jonathan Woodruff 2021-11-05 17:42:19 +00:00
  • 001c5e8347 put changing the interrupt counter and writing back to a register in the right order Franz Fuchs 2021-11-05 13:47:39 +00:00
  • 836ed5b143 Merge branch 'jdw57-jr-bsc-safety' into CHERI Jonathan Woodruff 2021-11-03 16:46:21 +00:00
  • cb1858447b Fix tracing of Sc. Sc is unique in that it writes both memory and a register value. This implementation works around the fact that the memory store data and the register write data are sharing the same field in the reorder buffer by inferring the writeback value of Sc from the byteEnable field. Jonathan Woodruff 2021-11-03 12:45:15 +00:00
  • 3908c5f955 A merge resolution not included in previous commit due to not saving file. Doh. Jonathan Woodruff 2021-11-02 18:12:05 +00:00
  • 7437c0c5e7 Some cleanups. Jonathan Woodruff 2021-11-02 18:08:22 +00:00
  • 56173bf2c2 Added interrupt counter Franz Fuchs 2021-11-02 15:45:40 +00:00
  • fb1a629e07 Decode: Fix capability width mode-dependent LR/SC Jessica Clarke 2021-10-27 15:44:23 +01:00
  • 87785eb25c Don't translate invalid vaddrs in the DTLB. Jonathan Woodruff 2021-10-14 17:13:18 +00:00
  • 1930025e1f Add StatCounters and GenerateHPMVector dependencies to verilator makefile Alexandre Joannou 2021-10-13 14:50:21 +01:00
  • dad3d504b1 Take into account BTB predictions. nextPc only reflected things known in the Decode stage, but not before (i.e. BTB predictions). This meant that we were pretty much always redirecting JRs. I needed to pipe through whether a jump was predicted by the BTB or not, and then only stop predicting if there is no nextPc prediction and also no BTB prediction. This should actually reasonably approximate SBC. Also, this one is not "redirecting", it's just flushing (flipping decode_epoch_local), trusting that we'll get a later redirection. Jonathan Woodruff 2021-10-11 16:23:45 +00:00
  • 3636f6239a Use Matt's slightly cleaner version of the function. Jonathan Woodruff 2021-10-11 16:23:22 +00:00
  • 1b5a036c46 Two fixes: do a proper "all bits are the same" function, as well as prepare a capability target to pass back. Jonathan Woodruff 2021-10-08 16:35:42 +00:00
  • 5d5bee3e08 Use an invalid virtual address when preventing prediction, and also detect invalid virtual addresses in the TLB and miss rather than proceed with page walking. Jonathan Woodruff 2021-10-08 11:00:11 +00:00
  • cec55419f5 Merge branch 'CHERI' into jdw57-jr-bsc-safety Jonathan Woodruff 2021-10-08 09:50:45 +00:00
  • 3d0aee0af4 Remove some verbosity from the committed state. Jonathan Woodruff 2021-10-07 16:30:32 +00:00
  • 81a12b89cb Move to NonPipelinedSquareRooter to hopefully fit more deterministically. We're still waiting for a fixed NonPipelinedDivider. Jonathan Woodruff 2021-10-07 16:28:57 +00:00
  • 520b09a6ed Use less wierd default value. Jonathan Woodruff 2021-10-07 16:16:27 +00:00
  • fe9e000f43 Merge branch 'CHERI' into jdw57-jr-bsc-safety Jonathan Woodruff 2021-10-04 08:37:56 +00:00
  • db54d27368 Move import DReg::* into ifdefs Franz Fuchs 2021-10-01 16:54:17 +01:00
  • df74a71d61 changed _Synth to _Sig following the new convention in BlueStuff Franz Fuchs 2021-09-30 15:02:47 +01:00
  • b4fe3ee93c adjusted SSITH_P3 Makefile to new version of HPM Events Franz Fuchs 2021-09-30 13:33:26 +01:00
  • c69acc2fc4 Don't predict next instruction for JR without a BTB prediction. Jonathan Woodruff 2021-09-30 12:20:40 +00:00
  • 9657339d87 "fix" non PERFORMANCE_MONITORING build gameboo 2021-09-29 18:09:06 +01:00
  • 87977461a6 Merge branch 'CHERI' of github.com:CTSRD-CHERI/Toooba into CHERI Franz Fuchs 2021-09-29 14:23:20 +01:00
  • cf8bfdc4a8 Merge branch 'faf28_hpm_consistency' into CHERI Franz Fuchs 2021-09-29 14:04:08 +01:00
  • c379a7a293 Changes to build with the new stat counters. Jonathan Woodruff 2021-09-24 13:18:55 +00:00
  • db9b5c7f54 re-integrated TagController Franz Fuchs 2021-09-24 11:39:23 +01:00
  • 8ef44b0a6c Workaround single step wedges by not waiting for flush before halting Peter Rugg 2021-07-02 16:41:35 +01:00
  • 4cfac08bca Bumped BlueStuff and made necessary adaptations Franz Fuchs 2021-09-23 15:25:46 +01:00
  • 4c194d4e82 integrated new version of RISCV_HPM_Events done by Jess Franz Fuchs 2021-09-23 14:36:50 +01:00
  • 9ea66bed86 Merge pull request #18 from CTSRD-CHERI/faf28_hpm_consistency Franz Fuchs 2021-09-20 13:21:52 +01:00
  • d80bc24bf3 Bumped TagController Franz Fuchs 2021-09-20 11:59:32 +01:00
  • 9320e53720 Bumped RISCV_HPM_Events made minor changes Franz Fuchs 2021-09-17 10:38:48 +01:00
  • 01000dba56 bump RISCV_HPM_Events Franz Fuchs 2021-09-14 11:32:45 +01:00
  • e675400ab8 Fixed things as pointed out by aj443 Franz Fuchs 2021-09-13 16:35:23 +01:00
  • 726c9f19a9 put deprecate note on Performance_Monitoring.md Franz Fuchs 2021-09-08 16:47:34 +01:00
  • c489a177d4 Fix type error. Jonathan Woodruff 2021-09-08 10:23:29 -05:00
  • 08231b7e5c Hopefully don't wedge on ifetch bus error. Jonathan Woodruff 2021-09-08 10:11:25 -05:00
  • 5d021e8c2e Bump RISCV_HPM_Events Franz Fuchs 2021-09-08 12:29:07 +01:00
  • c3775b80c9 Bumped new version of RISCV_HPM_Events Franz Fuchs 2021-09-07 16:38:30 +01:00
  • b567db8e8e Updated RISCV_HPM_Events submodule Franz Fuchs 2021-09-07 11:16:40 +01:00
  • f89e3d79c7 Bumped RISCV_HPM_Events Franz Fuchs 2021-09-07 08:32:34 +01:00
  • b25d70a8cc performed corrections for CONTRACTS_VERIFY Franz Fuchs 2021-09-07 08:15:03 +01:00
  • e58000c82d added HPM Events submodule again Franz Fuchs 2021-09-06 16:39:25 +01:00
  • c3648b82c3 Removed submodule HPM Events temporarily Franz Fuchs 2021-09-06 16:34:38 +01:00
  • ec1e29c513 Bump HPM Events Franz Fuchs 2021-09-06 16:01:32 +01:00
  • bc7eed67ab Did more cleaning up Franz Fuchs 2021-09-06 15:55:28 +01:00
  • 4c9d89e936 Performed a bit of cleaning up Franz Fuchs 2021-09-06 13:33:13 +01:00
  • 0d42b6075a Bump new HPM Events submodule Franz Fuchs 2021-09-06 13:10:38 +01:00
  • e4b4becea4 Added HPM Events submodule Franz Fuchs 2021-09-06 13:03:18 +01:00
  • 83172e612c Added makefile support for HPM events files Franz Fuchs 2021-09-06 12:44:29 +01:00
  • e33b4021d8 Integrated generateHPMVector function Franz Fuchs 2021-09-03 17:37:43 +01:00
  • 61d788ebc7 define No_Of_Evts in StatCounters Franz Fuchs 2021-09-03 14:14:32 +01:00
  • d36a129bf9 Bump TagController Franz Fuchs 2021-09-03 08:12:33 +01:00
  • 20e67971a5 Use type EventsCacheCore instead of Vector#(7, Bit#(1)) Franz Fuchs 2021-09-02 16:10:55 +01:00
  • b490cbb414 Bump TagController Franz Fuchs 2021-09-02 15:01:10 +01:00
  • 9f615e4481 initial changes for HPM consistency Franz Fuchs 2021-09-02 14:50:17 +01:00
  • 0970951184 Fix decoding of lr / sc with explicit bounds. Robert Norton 2021-08-17 16:39:20 +01:00
  • dbb6043760 Don't compile SelfInv* without define Peter Rugg 2021-08-16 14:42:27 +01:00
  • 7e2a946c4c Fix incorrect check for permitStoreLocalCap in capChecksMem. Robert Norton 2021-08-05 12:16:21 +01:00
  • 5b23f4cea0 Fix incorrect checks in capChecksMem. Robert Norton 2021-08-04 17:52:56 +01:00
  • b811cdb967 Remove unnecessary bzero in elf_to_hex. Robert Norton 2021-07-30 15:11:23 +01:00
  • ff0221f6bc Fix CHERI Exception numbering to match spec. Robert Norton 2021-06-14 21:53:42 +01:00
  • a07e0d32f5 Improve error handling in Run_regression.py Robert Norton 2021-07-30 16:41:48 +01:00
  • cc25ee69d3 Check in Rename stage for nextPcs of Traps Franz Fuchs 2021-07-26 07:02:21 +01:00
  • 2831cd7ee3 Changed size of bags for testing SBC to 32 Franz Fuchs 2021-07-16 14:51:26 +01:00
  • ae4a16cd6b Fix build issues for RVFI_DII simulators Peter Rugg 2021-07-13 14:52:08 +01:00
  • cb4b67ff7d Enable TSO_MM for simulations Peter Rugg 2021-07-12 15:50:33 +01:00
  • a8c4ce073d Factor out bsc flags to include_common Peter Rugg 2021-07-12 15:21:58 +01:00
  • 483cef8852 Removed unnecessary display statements Franz Fuchs 2021-07-12 14:55:07 +02:00
  • 7b1b564d62 Added missing ifdef Franz Fuchs 2021-07-12 13:30:53 +01:00